#SEMICON Taiwan

ASML's 135 Wafers an Hour Is an Acceptance Test, Not Fab Output

High-NA EUV fleet numbers were updated at SEMICON Taiwan: past 1.35 million wafers exposed, 84% availability. The throughput figure everyone is quoting came off a qualification run.

2h ago

A conference stage with a large screen showing ASML's High-NA EUV slide, listing 1.35 million wafers exposed and 135 wafers per hour on the EXE:5200B

AI Chips

Samsung's HBM5 and zHBM Numbers Are 2028 Targets, Not Silicon

At a Taipei summit Samsung laid out a 3D memory roadmap it calls CUBE. Every multiplier quoted is a goal measured against HBM4E, a part that is not shipping either.

3h ago

A speaker in a dark blazer presenting on stage against a plain backdrop at the Memory Executive Summit in Taipei

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