#Hot Chips 2026

Microsoft's Maia 200: 820 mm², 140B Transistors, But Older Memory

Six stacks of HBM3e and 7 TB/s, disclosed on the same afternoon OpenAI showed HBM4 at 15.4 TB/s — and Microsoft is still 'preparing to deploy.'

3d ago

A Microsoft Azure Maia 200 processor package, labelled on its heat spreader, held above a circuit board

Nvidia

Nvidia Presented a Groq LPU It Says It Does Not Make

315 PFLOPS, 128 GB of SRAM, 40 PB/s. Every one of those numbers is a rack of 256 chips, and the chip is somebody else's.

3d ago

Render of a black server rack filled with horizontally stacked accelerator trays, on a black background

AI Chips

OpenAI's Hot Chips Demo: 27 EFLOPS Means 2,048 Chips, at 4-Bit

Jalapeño is real silicon running Codex — 13.4 PFLOP/s, 216 GiB of HBM4, 700 watts. Every comparison being drawn against Nvidia crosses a precision boundary that voids it.

3d ago

Close-up of a large AI accelerator package with an exposed silicon die, mounted on a green circuit board

AI Chips

Waymo's Hot Chips Slides Say 160 TOPS, Not 1,000+

Four days of coverage said Waymo had built an Nvidia-class driving chip in-house. The engineering disclosure describes something smaller, cheaper and considerably more interesting.

4d ago

Photograph of the Waymo processor die alongside a key-specifications panel giving 208 mm² in N5, a 45 mm by 45 mm package, 273 GB/s memory bandwidth and a TDP under 75 W.

Nvidia

Nvidia Rubin Matches Blackwell Ultra's 288GB, But Not Its 2 ZFLOPS

The first architectural disclosure of Rubin came with two sets of numbers. One describes a GPU. The other describes a power station's worth of them, and they are already being mixed.

4d ago

Nvidia slide headed “Rubin GPU Delivers Industry-Leading Energy Efficiency at AI-Factory Scale”, with a specification table listing figures at 100 MW AI-factory scale beside an annotated package diagram.

AI Chips

IBM's Mainframe Core Executes Arm in Silicon, With 2,792 Instructions

A next-generation IBM Z processor runs z/Architecture and AArch64 natively on every core. The number IBM put on its own slide is the one that bounds the claim.

5d ago

Conference presentation slide describing the processor's enterprise inference acceleration, 16 active AI cores, 96GB of HBM3e memory and PCIe Gen6 interface.