Waymo published an architectural description of the compute inside its Driver on 20 August, introducing a purpose-built 5nm ASIC engineered to process, fuse and run neural networks on raw sensor data in real time before that data reaches the main ML stack. The company says these ASICs "alone deliver over 1,000 TOPS of ML performance dedicated to front-end processing," inside a heterogeneous system that pairs them with CPUs, GPUs and other accelerators. Compute has scaled 20x in eight years. The chip handles temporal denoising for low-light perception among other front-end work.
What the common framing gets wrong
The 1,000 TOPS figure is being set against whole-vehicle numbers from other autonomy programmes. Waymo's own sentence scopes it explicitly to front-end processing — sensor fusion and denoising ahead of the driving models — and adds that the chip "is just one of several exciting custom components we're developing." Comparing it to a rival's total-stack TOPS is comparing a subsystem to a system. Two further readings to resist: NVIDIA appearing on the partner list does not mean Waymo runs on NVIDIA — it is one of seven named suppliers alongside AMD, Micron, Samsung, Sandisk, Socionext and TSMC. And "20x in eight years" is a self-reported internal ratio with no absolute starting figure, so it cannot be checked against anything.
What is still not disclosed
No die size. No power draw. No unit cost. No production volume. No parameter counts for the models the system runs. For a post framed as looking under the trunk, the numbers that would let anyone estimate cost per vehicle are all absent — and cost per vehicle is the figure that determines whether the economics of a robotaxi fleet close.
Why now
Waymo has kept its compute opaque for a decade while competitors published TOPS figures quarterly. Disclosing architecture without disclosing cost is a recruiting and credibility move more than a transparency one — and it lands as the sixth-generation platform scales into new markets.